[PATCH v2 2/9] dt-bindings: mediatek: add DSC definition for mt8195
From: jason-jh.lin <hidden>
Date: 2021-07-10 11:43:34
Also in:
linux-arm-kernel
Subsystem:
drm drivers, drm drivers and misc gpu patches, drm drivers for mediatek, open firmware and flattened device tree bindings, the rest · Maintainers:
David Airlie, Simona Vetter, Maarten Lankhorst, Maxime Ripard, Thomas Zimmermann, Chun-Kuang Hu, Philipp Zabel, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Add DSC definition file for mt8195 display. Signed-off-by: jason-jh.lin <redacted> --- .../display/mediatek/mediatek,dsc.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml
new file mode 100644
index 000000000000..85ee0d85e77e
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsc.yaml@@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,dsc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: mediatek DSC Controller Device Tree Bindings + +maintainers: + - CK Hu <ck.hu@mediatek.com> + - Jitao shi <jitao.shi@mediatek.com> + - Jason-JH Lin <jason-jh.lin@mediatek.com> + +description: | + The DSC Standard is a specification of the algorithms used for + compressing and decompressing image display streams, including + the specification of the syntax and semantics of the compressed + video bit stream. DSC is designed for real-time systems, with + real-time compression, transmission, decompression, and Display. + +properties: + compatible: + enum: + - mediatek,mt8195-disp-dsc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: DSC Wrapper Clock + + clock-names: + items: + - const: DSC_WRAP0 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + dsc0: disp_dsc_wrap@1c009000 { + compatible = "mediatek,mt8195-disp-dsc"; + reg = <0 0x1c009000 0 0x1000>; + interrupts = <GIC_SPI 645 IRQ_TYPE_LEVEL_HIGH 0>; + clocks = <&vdosys0 CLK_VDO0_DSC_WRAP0>; + }; + +...
--
2.18.0
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