Thread (16 messages) 16 messages, 3 authors, 2004-09-30

Re: [PATCH] updates to Vitesse SATA driver

From: Dave <hidden>
Date: 2004-09-29 22:32:49

On Wed, 29 Sep 2004 18:19:40 -0400, Jeff Garzik [off-list ref] wrote:
So where did the discussion on this patch land?
Jeff,

I believe waiting for you to comment on whether to put in a hook for
controllers that do not support ATA_NIEN so it can mask/unmask IRQ
with a fixup.  Even though the spec for this particular SATA
controller says the bit is reserved, it seems to work just fine. From
my understanding, the registers are actually on the drives, and the
ones we write to the HBAs are just shadow registers right? I suppose
either we can use the "undocumented" reserved bit for ATA_NIEN, or
provide some sort of special hook in lib_ata core to clear the
interrupt bit....

Obviosly if it is working on IA32 or IA64, this code must be only
scanning device 0 per port and not device 1. Not sure why it is only
scanning 1 device on IA platforms, but both on XScale. Either way we
have a corner case here that should be addressed....


-- 
-= Dave =-

Software Engineer - Advanced Development Engineering Team 
Storage Component Division - Intel Corp. 
mailto://dave.jiang @ intel
----
The views expressed in this email are
mine alone and do not necessarily 
reflect the views of my employer
(Intel Corp.).
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