On 2/18/2026 1:46 AM, Krzysztof Kozlowski wrote:

On Tue, Feb 17, 2026 at 10:55:24AM +0530, Neeraj Soni wrote:

quoted

Starting with sc7280(kodiak), the ICE will have its own device-tree node.
So add the qcom,ice property to reference it.

To avoid double-modeling, when qcom,ice is present, disallow an embedded ICE

Please wrap commit message according to Linux coding style / submission
process (neither too early nor over the limit):
https://elixir.bootlin.com/linux/v6.4-rc1/source/Documentation/process/submitting-patches.rst#L597

Ack. Will fix in next patch.

quoted

register region in the SDHCI node. Older SoCs without ICE remain valid as
no additional requirement is imposed.

Co-developed-by: Abel Vesa <redacted>
Signed-off-by: Abel Vesa <redacted>
Co-developed-by: Abhinaba Rakshit <redacted>
Signed-off-by: Abhinaba Rakshit <redacted>
Signed-off-by: Neeraj Soni <redacted>

---

Some initial work is done by Abel here:
https://lore.kernel.org/all/ba3da82d-999b-b040-5230-36e60293e0fd@linaro.org/ (local)
and by Abhinaba here:
https://lore.kernel.org/all/20251009-add-separate-ice-ufs-and-emmc-device-nodes-for-qcs615-platform-v1-1-2a34d8d03c72@oss.qualcomm.com/ (local)

This patch adds the purpose and usage for phandle in the description and encodes
it properly in the schema.
---
 .../devicetree/bindings/mmc/sdhci-msm.yaml        | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
index 938be8228d66..9b902e0c8d09 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.yaml

@@ -140,6 +140,11 @@ properties:
     $ref: /schemas/types.yaml#/definitions/uint32
     description: platform specific settings for DLL_CONFIG reg.
 
+  qcom,ice:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description:
+      phandle to the Inline Crypto Engine (ICE) hardware block for this controller.

Srsly, I asked once and not much improved. What is explicitly written in
coding style which I asked you twice to read?

I have attempted to modifiy it as per the comment you gave in v3 here:
https://lore.kernel.org/all/b6e510da-b369-4c43-b9a1-455478af4948@kernel.org/ (local)

I will rephrase it to explain the usage better in next patch.

And how long is this line? Why such trivialities cannot be fixed and I
need to remind this every time?

It is 83 character long but i understand now you expect it to be wrapped 
at 75 as per kernel coding style. I missed it and stuck to the limit
dt_binding_check tool allowed. Will fix in next patch.

quoted

+
   iommus:
     minItems: 1
     maxItems: 8

@@ -223,6 +228,16 @@ allOf:
             - const: cqhci
             - const: ice
 
+  - if:
+      required:
+        - qcom,ice
+    then:
+      properties:
+        reg-names:
+          not:
+            contains:
+              const: ice

And reg is still 4? This is not correct syntax. You need to define
proper and final constraints per each device. I would write example, but
why... more things you could just ignore.

I had included changes for reg in v3:
https://lore.kernel.org/all/20260206112053.3287756-2-neeraj.soni@oss.qualcomm.com/ (local)

but those were not reviewed so i assume them to be incorrect and dropped it.
Will fix this in next patch and post.

 

Best regards,
Krzysztof

Regards,
Neeraj