[PATCH v4 0/3] Enable Inline crypto engine for kodiak and monaco
From: Neeraj Soni <hidden>
Date: 2026-02-17 05:25:34
Also in:
linux-mmc, lkml
Document Inline Crypto Engine (ICE) handle for SDHC and add its device-tree node to enable it for kodiak and monaco. How this patch was tested: - export ARCH=arm64 - export CROSS_COMPILE=aarch64-linux-gnu- - make menuconfig - make defconifg - make DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/sdhci-msm.yaml dt_binding_check - make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- CHECK_DTBS=y dtbs --- Changes in v4: - Added a new patch (3/3) for device tree changes for Monaco SoC. - Updated commit subject of cover letter to reflect "monaco". - Removed the text description of constraints from "description:" for "qcom,ice" and wrapped the code. - Corrected the schema code to reflect the constraint of "qcom,ice" usage properly. Changes in v3: - Described the purpose for phandle in "description:" for "qcom,ice". - Re-added the "if: required:" description for "qcom,ice" with proper encoding. - Corrected the uppercase for base address and reg address space for ICE DT node. Changes in v2: - Removed the "if: required:" description for "qcom,ice" dt-binding as the ICE node is optional. - Corrected the ICE dt node entry according to the dt-binding description. - Added test details. Changes in v1: - Updated the dt-binding for ICE node. - Added the dt node for ICE for kodiak. Neeraj Soni (3): dt-bindings: mmc: sdhci-msm: Add ICE phandle arm64: dts: qcom: kodiak: enable the inline crypto engine for SDHC arm64: dts: qcom: monaco: enable the inline crypto engine for SDHC .../devicetree/bindings/mmc/sdhci-msm.yaml | 15 +++++++++++++++ arch/arm64/boot/dts/qcom/kodiak.dtsi | 9 +++++++++ arch/arm64/boot/dts/qcom/monaco.dtsi | 9 +++++++++ 3 files changed, 33 insertions(+) -- 2.34.1