Re: [PATCH 04/13] dt-bindings: riscv: update microchip polarfire binds

Am Dienstag, 9. November 2021, 14:04:45 CET schrieb Geert Uytterhoeven:

Hi Conor,

On Tue, Nov 9, 2021 at 1:08 PM [off-list ref] wrote:

quoted

On 09/11/2021 08:34, Geert Uytterhoeven wrote:

quoted

On Mon, Nov 8, 2021 at 4:06 PM [off-list ref] wrote:

quoted

From: Conor Dooley <conor.dooley@microchip.com>

Add mpfs-soc to clear undocumented binding warning

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

quoted

quoted

quoted

--- a/Documentation/devicetree/bindings/riscv/microchip.yaml
+++ b/Documentation/devicetree/bindings/riscv/microchip.yaml

@@ -21,6 +21,7 @@ properties:
        - enum:
            - microchip,mpfs-icicle-kit
        - const: microchip,mpfs
+      - const: microchip,mpfs-soc

Doesn't the "s" in "mpfs" already stand for "soc"?

not wrong, but using mpf-soc would be confusing since "mpf" is the part
name for the non soc fpga. is it fine to just reuse "mpfs" for the dtsi
overall compatible and for the soc subsection?

I really meant: what is the difference between "microchip,mpfs" and
"microchip,mpfs-soc"? Can't you just use the former?

definitly agreed :-)

Having the board named as
	compatible = "microchip,mpfs-icicle-kit", "microchip,mpfs"
sounds the most sensible.

As Conor wrote, "mpfs" is the name of the soc itself - with mpf being
the fpga part, so that would follow what boards in other parts of the
kernel do.

Heiko