On 8/23/21 6:37 AM, DENG Qingfang wrote:

On Sun, Aug 22, 2021 at 09:31:42PM +0200, Alvin Šipraga wrote:

quoted

+/* Table LUT (look-up-table) address register */
+#define RTL8365MB_TABLE_LUT_ADDR_REG			0x0502
+#define   RTL8365MB_TABLE_LUT_ADDR_ADDRESS2_MASK	0x4000
+#define   RTL8365MB_TABLE_LUT_ADDR_BUSY_FLAG_MASK	0x2000
+#define   RTL8365MB_TABLE_LUT_ADDR_HIT_STATUS_MASK	0x1000
+#define   RTL8365MB_TABLE_LUT_ADDR_TYPE_MASK		0x0800
+#define   RTL8365MB_TABLE_LUT_ADDR_ADDRESS_MASK		0x07FF

FDB/MDB operations should be possible.

Yes, the switch supports these.

quoted

+/* Port isolation (forwarding mask) registers */
+#define RTL8365MB_PORT_ISOLATION_REG_BASE		0x08A2
+#define RTL8365MB_PORT_ISOLATION_REG(_physport) \
+		(RTL8365MB_PORT_ISOLATION_REG_BASE + (_physport))
+#define   RTL8365MB_PORT_ISOLATION_MASK			0x07FF

Bridge offload should be implemented with these isolation registers.

That was my plan, albeit not yet implemented in this series.

FYI:
https://cdn.jsdelivr.net/gh/libc0607/Realtek_switch_hacking@files/Realtek_Unmanaged_Switch_ProgrammingGuide.pdf>> 

Yes, this is the document we got from Realtek and where the layout of 
the CPU tag format was lifted from. Other reviewers might find it 
helpful to check this out. Thanks!

Kind regards,
Alvin