[PATCH v5 11/11] MIPS: Loongson64: Move MIPS_CPU_IRQ_BASE
From: Jiaxun Yang <jiaxun.yang@flygoat.com>
Date: 2020-03-18 06:27:00
Also in:
linux-mips, lkml
Subsystem:
mips, mips/loongson64 architecture, the rest · Maintainers:
Thomas Bogendoerfer, Huacai Chen, Jiaxun Yang, Linus Torvalds
To prevent CPU IRQ collide with PCH IRQ, we move down CPU IRQ BASE to 16. Co-developed-by: Huacai Chen <redacted> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- arch/mips/include/asm/mach-loongson64/irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/mips/include/asm/mach-loongson64/irq.h b/arch/mips/include/asm/mach-loongson64/irq.h
index 12208119aac0..1ce2e0bbe305 100644
--- a/arch/mips/include/asm/mach-loongson64/irq.h
+++ b/arch/mips/include/asm/mach-loongson64/irq.h@@ -5,7 +5,7 @@ #include <boot_param.h> /* cpu core interrupt numbers */ -#define MIPS_CPU_IRQ_BASE 56 +#define MIPS_CPU_IRQ_BASE 16 #include_next <irq.h> #endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */
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2.26.0.rc2