Hi Chanwoo,

On 7/16/19 11:13 AM, Chanwoo Choi wrote:

On 19. 7. 15. 오후 9:43, Lukasz Luba wrote:

quoted

Change parent of dout_aclk400_wcore to mout_aclk400_wcore which reflects
topology described in the RM.

Signed-off-by: Lukasz Luba <redacted>
---
  drivers/clk/samsung/clk-exynos5420.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c
index d353870e7fda..361ee53fc9fc 100644
--- a/drivers/clk/samsung/clk-exynos5420.c
+++ b/drivers/clk/samsung/clk-exynos5420.c

@@ -577,7 +577,7 @@ static const struct samsung_mux_clock exynos5420_mux_clks[] __initconst = {
  
  static const struct samsung_div_clock exynos5420_div_clks[] __initconst = {
  	DIV(CLK_DOUT_ACLK400_WCORE, "dout_aclk400_wcore",
-			"mout_aclk400_wcore_bpll", DIV_TOP0, 16, 3),
+			"mout_aclk400_wcore", DIV_TOP0, 16, 3),
  };
  
  static const struct samsung_gate_clock exynos5420_gate_clks[] __initconst = {

Acked-by: Chanwoo Choi <cw00.choi@samsung.com>

If possible, you better to send it to stable mailing list
with Fixes information.

Thank you, I will do it when finish the v2.

Regards,
Lukasz