Thread (90 messages) 90 messages, 3 authors, 2019-07-23
STALE2544d

[PATCH v1 23/50] ARM: dts: exynos: change lowest OPP in bus_disp1_fimd in Exynos5420

From: Lukasz Luba <hidden>
Date: 2019-07-15 12:47:13
Also in: linux-arm-kernel, linux-clk, linux-samsung-soc, lkml
Subsystem: the rest · Maintainer: Linus Torvalds

The lowest OPP must be aligned to possible value after division of parent
clock rate. Thus, change it to the value which is true for clock 1200MHz.

Signed-off-by: Lukasz Luba <redacted>
---
 arch/arm/boot/dts/exynos5420.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 6e82ffcbeacd..0739e7bd4628 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1294,7 +1294,7 @@
 			compatible = "operating-points-v2";
 
 			opp00 {
-				opp-hz = /bits/ 64 <120000000>;
+				opp-hz = /bits/ 64 <150000000>;
 			};
 			opp01 {
 				opp-hz = /bits/ 64 <200000000>;
-- 
2.17.1
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