Re: [PATCH v7 07/13] dt-bindings: memory-controllers: add Exynos5422 DMC device description
From: Lukasz Luba <hidden>
Date: 2019-05-10 13:12:59
Also in:
linux-pm, linux-samsung-soc, lkml
Hi Rob, On 5/8/19 10:35 PM, Rob Herring wrote:
On Wed, May 8, 2019 at 4:45 AM Lukasz Luba [off-list ref] wrote:quoted
On 5/8/19 9:19 AM, Krzysztof Kozlowski wrote:quoted
On Tue, 7 May 2019 at 19:04, Rob Herring [off-list ref] wrote:quoted
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+- devfreq-events : phandles of the PPMU events used by the controller. +- samsung,syscon-chipid : phandle of the ChipID used by the controller. +- samsung,syscon-clk : phandle of the clock register set used by the controller.Looks like a hack. Can't you get this from the clocks property? What is this for?Hi Rob, Lukasz uses these two syscon regmaps to read certain registers. For chipid he reads it to check the size of attached memory (only 2 GB version is supported). This indeed looks like a hack. However the second regmap (clk) is needed to get the timing data from registers from DMC clock driver address space. These are registers with memory timing so their data is not exposed anyway in common clk framework.Okay, please just explain what your accessing. Consider adding the offset as a cell in case stuff moves around on another chip.
Good point. I will also have to regmap the registers and not take from 'clock' device.
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Best regards, KrzysztofThank you Krzysztof for a fast response. I have also responded to Rob. I wouldn't call accessing chipid registers as a hack, though. The DMC registers do not contain information about the memory chip since it is in phase of production the board not the chip. Thus, chipid regs (which loads from e-fuses) are best place to put information about memory type/size.For efuses, we have a binding (nvmem). Maybe you should use it.
I don't know about the design of a planned 'chipid' driver, which going to be sent to LKML in near future. Thank you for this information, I will talk with Bartek. Regards, Lukasz
Rob