Re: [PATCH v4 02/11] clk: sunxi-ng: a64: Add max. rate constraint to video PLLs
From: Sergey Suloev <hidden>
Date: 2018-09-05 10:22:59
Also in:
dri-devel, linux-arm-kernel, linux-clk, lkml
Hi, On 09/05/2018 10:16 AM, Maxime Ripard wrote:
On Tue, Sep 04, 2018 at 12:40:44PM +0800, Icenowy Zheng wrote:quoted
Video PLLs on A64 can be set to higher rate that it is actually supported by HW. Limit maximum rate to 1008 MHz. This is the maximum allowed rate by BSP clock driver. Interestengly, user manual specifies maximum frequency to be 600 MHz. Historically, this data was wrong in some user manuals for other SoCs, so more faith is put in BSP clock driver. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>Applied, thanks! Maxime _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
what source tree this patch is supposed to apply for ? I can't find the SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK_MIN_MAX declaration in 4.19 Thank you Sergey