Re: [PATCH v4 01/11] clk: sunxi-ng: a64: Add minimal rate for video PLLs
From: Maxime Ripard <hidden>
Date: 2018-09-05 07:16:36
Also in:
dri-devel, linux-arm-kernel, linux-clk, lkml
From: Maxime Ripard <hidden>
Date: 2018-09-05 07:16:36
Also in:
dri-devel, linux-arm-kernel, linux-clk, lkml
On Tue, Sep 04, 2018 at 12:40:43PM +0800, Icenowy Zheng wrote:
From: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> According to documentation and experience with other similar SoCs, video PLLs don't work stable if their output frequency is set below 192 MHz. Because of that, set minimal rate to both A64 video PLLs to 192 MHz. Signed-off-by: Jagan Teki <jagan-dyjBcgdgk7Pe9wHmmfpqLFaTQe2KTcn/@public.gmane.org> Signed-off-by: Icenowy Zheng <redacted> Reviewed-by: Jernej Skrabec <redacted>
Applied, thanks Maxime -- Maxime Ripard, Bootlin Embedded Linux and Kernel engineering https://bootlin.com