Re: [PATCH] clk: renesas: cpg-mssr: Add R7S9210 support
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2018-08-28 07:10:37
Also in:
linux-clk, linux-renesas-soc
Hi Chris, On Tue, Aug 28, 2018 at 12:13 AM Chris Brandt [off-list ref] wrote:
On Monday, August 27, 2018 1, Geert Uytterhoeven wrote:quoted
Given the differences, and the limited amount of RAM on RZ/A2, I think you would be better off with a separate renesas-cpg-stbcr driver, and an r7s9210-cpg-stbcr counterpart.I went and measured the amount of RAM being used by the driver (allocated during boot when the driver is loaded and probed), and it's only 8KB. That's not really much compared to other drivers and subsystems being loaded in the system. Of course RZ/A tries to be RAM sensitive...but 8KB for a clock driver is not my biggest concern. So with that said, I could add in a driver option to not register the reset controller. And, also make a macro so users can specify "36" instead of "306" in the DT. And then, I no longer have to worry about duplicate code (2 drivers do almost the same thing). What do you think?
OK for me. Changing the print format in the debug prints is probably too much work, but those matter less than the clock numbers in the DTS.
Were you expecting the driver to allocate more than 8K of RAM on boot?
I was thinking mainly about code size. But you're right, (a) you use XIP
(with plenty of FLASH?), and (b) RAM size should be similar for a combined
and a separate driver.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds