@@ -797,34 +809,204 @@ static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data)
writel(val_irq, data->base + tmu_intclear);
}
+static const struct exynos_tmu_variant exynos3250_data = {
+ .soc = SOC_ARCH_EXYNOS3250,
+ .gain = 8,
+ .reference_voltage = 16,
+ .efuse_value = 55,
+ .min_efuse_value = 40,
+ .max_efuse_value = 100,
+ .tmu_set_low_temp = exynos4412_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos4412_tmu_set_high_temp,
+ .tmu_disable_low = exynos4412_tmu_disable_low,
+ .tmu_disable_high = exynos4210_tmu_disable_high,
+ .tmu_set_crit_temp = exynos4412_tmu_set_crit_temp,
+ .tmu_initialize = exynos4412_tmu_initialize,
+ .tmu_control = exynos4210_tmu_control,
+ .tmu_read = exynos4412_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos4210_data = {
+ .soc = SOC_ARCH_EXYNOS4210,
+ .gain = 15,
+ .reference_voltage = 7,
+ .efuse_value = 55,
+ .min_efuse_value = 40,
+ .max_efuse_value = 100,
+ .tmu_set_low_temp = exynos4210_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos4210_tmu_set_high_temp,
+ .tmu_disable_low = exynos4210_tmu_disable_low,
+ .tmu_disable_high = exynos4210_tmu_disable_high,
+ .tmu_set_crit_temp = exynos4210_tmu_set_crit_temp,
+ .tmu_initialize = exynos4210_tmu_initialize,
+ .tmu_control = exynos4210_tmu_control,
+ .tmu_read = exynos4210_tmu_read,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos4412_data = {
+ .soc = SOC_ARCH_EXYNOS4412,
+ .gain = 8,
+ .reference_voltage = 16,
+ .efuse_value = 55,
+ .min_efuse_value = 40,
+ .max_efuse_value = 100,
+ .tmu_set_low_temp = exynos4412_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos4412_tmu_set_high_temp,
+ .tmu_disable_low = exynos4412_tmu_disable_low,
+ .tmu_disable_high = exynos4210_tmu_disable_high,
+ .tmu_set_crit_temp = exynos4412_tmu_set_crit_temp,
+ .tmu_initialize = exynos4412_tmu_initialize,
+ .tmu_control = exynos4210_tmu_control,
+ .tmu_read = exynos4412_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos5250_data = {
+ .soc = SOC_ARCH_EXYNOS5250,
+ .gain = 8,
+ .reference_voltage = 16,
+ .efuse_value = 55,
+ .min_efuse_value = 40,
+ .max_efuse_value = 100,
+ .tmu_set_low_temp = exynos4412_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos4412_tmu_set_high_temp,
+ .tmu_disable_low = exynos4412_tmu_disable_low,
+ .tmu_disable_high = exynos4210_tmu_disable_high,
+ .tmu_set_crit_temp = exynos4412_tmu_set_crit_temp,
+ .tmu_initialize = exynos4412_tmu_initialize,
+ .tmu_control = exynos4210_tmu_control,
+ .tmu_read = exynos4412_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos5260_data = {
+ .soc = SOC_ARCH_EXYNOS5260,
+ .gain = 8,
+ .reference_voltage = 16,
+ .efuse_value = 55,
+ .min_efuse_value = 40,
+ .max_efuse_value = 100,
+ .tmu_set_low_temp = exynos4412_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos4412_tmu_set_high_temp,
+ .tmu_disable_low = exynos4412_tmu_disable_low,
+ .tmu_disable_high = exynos4210_tmu_disable_high,
+ .tmu_set_crit_temp = exynos4412_tmu_set_crit_temp,
+ .tmu_initialize = exynos4412_tmu_initialize,
+ .tmu_control = exynos4210_tmu_control,
+ .tmu_read = exynos4412_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos5420_data = {
+ .soc = SOC_ARCH_EXYNOS5420,
+ .gain = 8,
+ .reference_voltage = 16,
+ .efuse_value = 55,
+ .min_efuse_value = 16,
+ .max_efuse_value = 76,
+ .tmu_set_low_temp = exynos4412_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos4412_tmu_set_high_temp,
+ .tmu_disable_low = exynos4412_tmu_disable_low,
+ .tmu_disable_high = exynos4210_tmu_disable_high,
+ .tmu_set_crit_temp = exynos4412_tmu_set_crit_temp,
+ .tmu_initialize = exynos4412_tmu_initialize,
+ .tmu_control = exynos4210_tmu_control,
+ .tmu_read = exynos4412_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos5420_triminfo_data = {
+ .soc = SOC_ARCH_EXYNOS5420_TRIMINFO,
+ .gain = 8,
+ .reference_voltage = 16,
+ .efuse_value = 55,
+ .min_efuse_value = 16,
+ .max_efuse_value = 76,
+ .tmu_set_low_temp = exynos4412_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos4412_tmu_set_high_temp,
+ .tmu_disable_low = exynos4412_tmu_disable_low,
+ .tmu_disable_high = exynos4210_tmu_disable_high,
+ .tmu_set_crit_temp = exynos4412_tmu_set_crit_temp,
+ .tmu_initialize = exynos4412_tmu_initialize,
+ .tmu_control = exynos4210_tmu_control,
+ .tmu_read = exynos4412_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos5433_data = {
+ .soc = SOC_ARCH_EXYNOS5433,
+ .gain = 8,
+ .reference_voltage = 16,
+ .efuse_value = 75,
+ .min_efuse_value = 40,
+ .max_efuse_value = 150,
+ .tmu_set_low_temp = exynos5433_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos5433_tmu_set_high_temp,
+ .tmu_disable_low = exynos5433_tmu_disable_low,
+ .tmu_disable_high = exynos5433_tmu_disable_high,
+ .tmu_set_crit_temp = exynos5433_tmu_set_crit_temp,
+ .tmu_initialize = exynos5433_tmu_initialize,
+ .tmu_control = exynos5433_tmu_control,
+ .tmu_read = exynos4412_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
+static const struct exynos_tmu_variant exynos7_data = {
+ .soc = SOC_ARCH_EXYNOS7,
+ .gain = 9,
+ .reference_voltage = 17,
+ .efuse_value = 75,
+ .min_efuse_value = 15,
+ .max_efuse_value = 100,
+ .tmu_set_low_temp = exynos7_tmu_set_low_temp,
+ .tmu_set_high_temp = exynos7_tmu_set_high_temp,
+ .tmu_disable_low = exynos7_tmu_disable_low,
+ .tmu_disable_high = exynos7_tmu_disable_high,
+ .tmu_set_crit_temp = exynos7_tmu_set_crit_temp,
+ .tmu_initialize = exynos7_tmu_initialize,
+ .tmu_control = exynos7_tmu_control,
+ .tmu_read = exynos7_tmu_read,
+ .tmu_set_emulation = exynos4412_tmu_set_emulation,
+ .tmu_clear_irqs = exynos4210_tmu_clear_irqs,
+};
+
static const struct of_device_id exynos_tmu_match[] = {
{
.compatible = "samsung,exynos3250-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS3250,
+ .data = &exynos3250_data,
}, {
.compatible = "samsung,exynos4210-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS4210,
+ .data = &exynos4210_data,
}, {
.compatible = "samsung,exynos4412-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS4412,
+ .data = &exynos4412_data,
}, {
.compatible = "samsung,exynos5250-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS5250,
+ .data = &exynos5250_data,
}, {
.compatible = "samsung,exynos5260-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS5260,
+ .data = &exynos5260_data,
}, {
.compatible = "samsung,exynos5420-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS5420,
+ .data = &exynos5420_data,
}, {
.compatible = "samsung,exynos5420-tmu-ext-triminfo",
- .data = (const void *)SOC_ARCH_EXYNOS5420_TRIMINFO,
+ .data = &exynos5420_triminfo_data,
}, {
.compatible = "samsung,exynos5433-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS5433,
+ .data = &exynos5433_data,
}, {
.compatible = "samsung,exynos7-tmu",
- .data = (const void *)SOC_ARCH_EXYNOS7,
+ .data = &exynos7_data,
},
{ },
};