Re: [PATCH v2 2/2] arm64: dts: rockchip: Add devicetree for the ROC-RK3588-RT

hi,
I'm very sorry. Due to the default configuration of my email, I didn't
receive your email normally. I have fixed this issue.

On Tue, 2025-09-09 at 14:31 +0200, Andrew Lunn wrote:

quoted

- 2x Gigabit Ethernet, 1x 2.5G Ethernet

I actually only see the 2x 1G. Is the 2.5G not supported yet?

The 2.5G Ethernet is based on the Realtek RTL8125 network controller of
PCIe 2.0x1.

+&combphy0_ps {
+       status = "okay";
+};

[snip]

+&pcie2x1l2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie2_2_rst>;
+       reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
+       status = "okay";
+};

quoted

+&gmac0 {
+	clock_in_out = "output";
+	phy-handle = <&rgmii_phy0>;
+	phy-mode = "rgmii-rxid";
+	pinctrl-names = "default";
+	pinctrl-0 = <&gmac0_miim
+		     &gmac0_tx_bus2
+		     &gmac0_rx_bus2
+		     &gmac0_rgmii_clk
+		     &gmac0_rgmii_bus>;
+	tx_delay = <0x47>;

What happened about my comment that "rgmii-rxid" is probably wrong?

If you think it is correct, you should reply with a
justification. Maybe PCB is very odd? In which case, a comment would
be good to explain who it is odd.

The Ethernet part of the board is designed with reference to the
rockchip evb1 board. 

link: 
https://github.com/Firefly-rk-linux/docs/blob/rk3588/firefly-public/en/Common/GMAC/Rockchip_Developer_Guide_Linux_GMAC_RGMII_Delayline_EN.pdf


The document describes the usage of the rgmii-rxid mode:

When the hardware enables the RX delay of the PHY. Need to turn off the
RX delay of the GMAC, and the dts configuration mode becomes "rgmii-
rxid".

	Andrew

Kaison