[PATCH 11/13] arm64: dts: amlogic: S7: Add clk-measure controller node
From: Chuan Liu via B4 Relay <devnull+chuan.liu.amlogic.com@kernel.org>
Date: 2025-08-15 08:37:41
Also in:
b4-sent, linux-amlogic, linux-devicetree, lkml
Subsystem:
arm/amlogic meson soc support, the rest · Maintainers:
Neil Armstrong, Kevin Hilman, Linus Torvalds
From: Chuan Liu <redacted> Add the clk-measure controller node for S7 SoC family. Signed-off-by: Chuan Liu <redacted> --- arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi | 253 ++++++++++++++++++++++++++++ 1 file changed, 253 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
index 260918b37b9a..f6b2dae3db39 100644
--- a/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
+++ b/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi@@ -175,6 +175,259 @@ gpiocc: gpio@300 { gpio-ranges = <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>; }; }; + clk_msr: clock-measure@48000 { + compatible = "amlogic,clk-measure"; + reg = <0x0 0x48000 0x0 0x1c>; + clkmsr-reg-v2; + clkmsr-indices = <0>, + <1>, + <2>, + <5>, + <6>, + <8>, + <10>, + <11>, + <12>, + <13>, + <15>, + <18>, + <19>, + <20>, + <21>, + <22>, + <23>, + <24>, + <25>, + <26>, + <27>, + <28>, + <29>, + <30>, + <32>, + <33>, + <34>, + <36>, + <37>, + <38>, + <39>, + <40>, + <49>, + <50>, + <51>, + <52>, + <53>, + <54>, + <55>, + <57>, + <58>, + <59>, + <60>, + <61>, + <62>, + <63>, + <64>, + <65>, + <66>, + <67>, + <76>, + <77>, + <78>, + <80>, + <81>, + <82>, + <84>, + <85>, + <86>, + <87>, + <88>, + <93>, + <99>, + <106>, + <110>, + <111>, + <113>, + <114>, + <115>, + <116>, + <118>, + <121>, + <130>, + <131>, + <132>, + <133>, + <134>, + <135>, + <136>, + <137>, + <138>, + <139>, + <140>, + <141>, + <142>, + <143>, + <144>, + <145>, + <146>, + <147>, + <148>, + <149>, + <150>, + <151>, + <152>, + <153>, + <154>, + <160>, + <161>, + <162>, + <163>, + <164>, + <165>, + <166>, + <167>, + <168>, + <169>, + <176>, + <177>, + <178>, + <179>, + <180>, + <181>, + <182>, + <183>, + <184>, + <185>, + <186>, + <187>, + <188>, + <189>, + <190>, + <191>, + <192>; + clkmsr-names = "sys_clk", + "axi_clk", + "rtc_clk", + "mali", + "cpu_clk_div16", + "cecb_clk", + "fclk_div5", + "p21_usb2_ckout", + "p20_usb2_ckout", + "eth_mpll_test", + "fclk_50m", + "gp1_pll", + "hifi_pll", + "gp0_pll", + "hifi1_pll", + "eth_fclk_50m_ckout", + "sys_pll_div16", + "ddr_dpll_pt_clk", + "mod_Tsin_A_CLK_IN", + "ext_Tsin_B_CLK_IN", + "mod_Tsin_C_CLK_IN", + "mod_Tsin_D_CLK_IN", + "dsi_pll_div_clk_out", + "dsi_pll_clk", + "eth_125m", + "eth_rmii", + "co_clkin_to_mac", + "co_rx_clk", + "co_tx_clk", + "eth_phy_rxclk", + "eth_phy_plltxclk", + "ephy_test_clk", + "hdmi_vx1_pix_clk", + "vid_pll_div_clk_out", + "enci", + "encp", + "encl", + "vdac", + "cdac", + "lcd_an_ph2", + "lcd_an_ph3", + "hdmitx_pixel", + "vdin_meas", + "vpu", + "vpu_clkb", + "vpu_clkb_tmp", + "vpu_clkc", + "vid_lock", + "vapb", + "ge2d", + "hdmitx_tmds", + "hdmitx_sys", + "hdmitx_fe", + "hdmitx_prif", + "hdmitx_200m", + "hdmitx_aud", + "audio_tohdmitx_mclk", + "audio_tohdmitx_bclk", + "audio_tohdmitx_lrclk", + "audio_tohdmitx_spdif_clk", + "htx_aes_clk", + "vdec", + "hevcf", + "deskew_pll_clk_div32_out", + "sc", + "saradc", + "sd_emmc_c", + "sd_emmc_b", + "sd_emmc_a", + "gpio_msr_clk", + "spicc", + "ts", + "o_vad_clk", + "au_dac_clk_x128", + "audio_locker_in_clk", + "audio_locker_out_clk", + "audio_tdmout_c_sclk", + "audio_tdmout_b_sclk", + "audio_tdmout_a_sclk", + "audio_tdmin_lb_sclk", + "audio_tdmin_c_sclk", + "audio_tdmin_b_sclk", + "audio_tdmin_a_sclk", + "audio_resamplea_clk", + "audio_pdm_sysclk", + "audio_spdifout_b_mst_clk", + "audio_spdifout_mst_clk", + "audio_spdifin_mst_clk", + "mod_audio_pdm_dclk_o", + "audio_resampleb_clk", + "pcie_pipe_clk", + "pcie_ref_clk", + "pcie_upcrx_cdrclk", + "pcie_upcrx_clk_sync_b20", + "pcie_u3p2pll1_clk_div16", + "pcie_u3p2pll0_clkout", + "pcie_ref_clk_p", + "pwm_j", + "pwm_i", + "pwm_h", + "pwm_g", + "pwm_f", + "pwm_e", + "pwm_d", + "pwm_c", + "pwm_b", + "pwm_a", + "rng_ring_clk[0]", + "rng_ring_clk[1]", + "rng_ring_clk[2]", + "rng_ring_clk[3]", + "osc_ring_clk[0](a55 core0 14_slvt)", + "osc_ring_clk[1](a55 core1 14_slvt)", + "osc_ring_clk[2](a55 core2 14_slvt)", + "osc_ring_clk[3](a55 core3 14_slvt)", + "osc_ring_clk[4](a55_pwr[0] 16_slvt)", + "osc_ring_clk[5](a55_pwr[1] 14_lvt)", + "osc_ring_clk[6](a55_pwr[2] 14_rvt)", + "osc_ring_clk[7](mali[0] 14_lvt)", + "osc_ring_clk[8](mali[1] 14_rvt)", + "osc_ring_clk[9](dos[0] 16_lvt)", + "osc_ring_clk[10](dos[1] 14_rvt)", + "osc_ring_clk[11](ddr[0] 9t_14_lvt)", + "osc_ring_clk[12](top[0] 16_rvt)"; + }; }; }; };
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2.42.0