The first patch enable the PCI Power Control driver to control the power
state of PCI slots. The second patch add the bus topology of PCIe domain 3
on x1e80100 platform. The third patch add perst, wake and clkreq sideband
signals, and describe the regulators powering the rails of the PCI slots in
the devicetree for PCIe3 controller and PHY device.

Qiang Yu (3):
  arm64: defconfig: enable PCI Power Control for PCIe3
  arm64: dts: qcom: x1e80100: add bus topology for PCIe domain 3
  arm64: dts: qcom: x1e80100-qcp: Add power control and sideband signals
    for PCIe3

 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 119 ++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/x1e80100.dtsi    |  10 ++
 arch/arm64/configs/defconfig              |   1 +
 3 files changed, 130 insertions(+)


base-commit: 0a2f889128969dab41861b6e40111aa03dc57014
-- 
2.34.1