On Wed, Jan 15, 2025 at 6:22 AM Piotr Oniszczuk
[off-list ref] wrote:

quoted

Wiadomość napisana przez Peter Geis [off-list ref] w dniu 15 sty 2025, o godz. 02:26:


This is my newly reworked phy driver for the rk3328 usb3 phy. It is
based loosely on my original version, but as of now almost nothing of
the original driver remains. The main fix here is the discovery of
BIT(6) in the interrupt enable grf register fixes the usb3 disconnection
detection (mostly). On occasion an unpopulated usb3 hub will take
several seconds to disconnect. However this means all of the hack around
work to reset the usb core manually is no longer required.

I did my best to document all registers I could find. A lot was taken
from emails between myself and Rockchip's engineers, much thanks to
William Wu [off-list ref] for their assistance here. The rest of
the config bits were taken from the rk3328 and rk3228h TRMs and the
downstream driver. Everything that I couldn't find a definition for is
prefixed UNK_ or UNKNOWN_. There's a lot of obviously used configuration
registers with the pipe interface that are also undocumented.

The only major bug I have so far is my AX88179 usb3 gigabit ethernet
adapter (Pluggable brand) crashes out when large amounts of data are
transmitted. I suspect this is related to the RX and TX tuning, as
leaving it at defaults makes things worse. As I am not a USB3 engineer
and I do not have the specialized knowledge and hardware to determine
what is going wrong, I am hoping the mailing list will have an answer
here.

Please test and review.

Very Respectfully,
Peter Geis



Peter Geis (6):
 clk: rockchip: fix wrong clk_ref_usb3otg parent for rk3328
 dt-bindings: phy: rockchip: add rk3328 usb3 phy
 phy: rockchip: add driver for rk3328 usb3 phy
 arm64: dts: rockchip: add rk3328 usb3 phy node
 arm64: dts: rockchip: enable the usb3 phy on rk3328-roc boards
 arm64: dts: rockchip: enable the usb3 phy on remaining rk3328 boards

.../bindings/phy/rockchip,inno-usb3phy.yaml   | 166 ++++
.../boot/dts/rockchip/rk3328-nanopi-r2.dtsi   |  12 +
.../dts/rockchip/rk3328-orangepi-r1-plus.dtsi |  12 +
arch/arm64/boot/dts/rockchip/rk3328-roc.dtsi  |  12 +
.../boot/dts/rockchip/rk3328-rock-pi-e.dts    |  12 +
.../arm64/boot/dts/rockchip/rk3328-rock64.dts |  12 +
arch/arm64/boot/dts/rockchip/rk3328.dtsi      |  39 +
drivers/clk/rockchip/clk-rk3328.c             |   2 +-
drivers/phy/rockchip/Kconfig                  |  10 +
drivers/phy/rockchip/Makefile                 |   1 +
drivers/phy/rockchip/phy-rockchip-inno-usb3.c | 869 ++++++++++++++++++
11 files changed, 1146 insertions(+), 1 deletion(-)
create mode 100644 Documentation/devicetree/bindings/phy/rockchip,inno-usb3phy.yaml
create mode 100644 drivers/phy/rockchip/phy-rockchip-inno-usb3.c

--
2.39.5

Peter,
I applied this as test run on 6.12.9 and dmesg says:

[   16.368514] rockchip-usb3-phy ff460000.usb3-phy: could not get usb3phy ref clock
[   16.368534] rockchip-usb3-phy ff460000.usb3-phy: parse dt failed -2
[   16.368543] rockchip-usb3-phy ff460000.usb3-phy: probe with driver rockchip-usb3-phy failed with error -2

This is on beelink a1 tvbox.

Do I miss something?

Good Morning,

That is an interesting failure. The simplest answer is the
`clock-names = "refclk-usb3otg", "usb3phy-otg", "usb3phy-pipe";` line
was corrupted. Please check that when applied it matches the patch
exactly. If you are still having problems, you can send me the
compiled DTB and I'll take a look.

Very Respectfully,
Peter Geis