On Fri, Jan 03, 2025 at 04:14:31PM -0600, Rob Herring wrote:

On Fri, Jan 3, 2025 at 12:16 PM Vincenzo Frascino
[off-list ref] wrote:

quoted

+       cpus {
+               #address-cells = <2>;
+               #size-cells = <0>;
+
+               cpu0: cpu@0 {
+                       compatible = "arm,neoverse-n1";

I'm pretty sure the N1 doesn't support CHERI/morello. Perhaps
"arm,neoverse-n1-morello" if we want to capture what it is derived
from and since "arm,morello" is taken already.

Rainier is the codename of the core itself, and Morello LLVM recognises
-mcpu=rainier not -mcpu=morello (there's -march=morello instead), so
perhaps it should really be "arm,rainier". Though SMBIOS reports it as
Morello-R0P1 so it may be best to use "arm,morello" here.

The real problem is that the board compatible has changed to include a
generic "arm,morello" node, with the argument that a v2 board could
appear. So why not instead change *that* to be something like:

  compatible = "arm,morello-sdp-v1", "arm,morello-sdp";

Then you can use "arm,morello" here for the cores.

Though some of this may depend on what the FVP's DTS looks like; is it
going to claim to be a Morello SDP, or does there need to be a common
denominator compatible beneath that it can use?

Please CC me on future versions of this series.

Jess