Re: [PATCH v2 17/19] iommu/arm-smmu-v3: Add arm_smmu_viommu_cache_invalidate

On Wed, Sep 11, 2024 at 08:17:23AM +0000, Tian, Kevin wrote:

quoted

My understanding of VMID is something like domain id in x86 arch's. Is
my understanding correct?

yes

quoted

If a VMID for an S2 hwpt is valid on physical IOMMU A but has already
been allocated for another purpose on physical IOMMU B, how can it be
shared across both IOMMUs? Or the VMID is allocated globally?

I'm not sure that's a problem. The point is that each vIOMMU object
will get a VMID from the SMMU which it's associated to (assume
one vIOMMU cannot span multiple SMMU). Whether that VMID
is globally allocated or per-SMMU is the policy in the SMMU driver.

It's the driver's responsibility to ensure not using a conflicting VMID
when creating an vIOMMU instance.

It can happen to be the same VMID across all physical SMMUs, but
not necessary to be the same, i.e. two SMMUs might have two VMIDs
with different ID values, allocated from the their own VMID pools,
since cache entries in their own TLB can be tagged with their own
VMIDs.

Does domain id for intel-iommu have to be the same? I recall there
is only one iommu instance on intel chips at this moment?

Thanks
Nicolin