Re: [PATCH 07/12] dt-bindings: net: Add StarFive JH7100 SoC
From: Andrew Lunn <andrew@lunn.ch>
Date: 2023-02-11 16:02:01
Also in:
linux-devicetree, linux-riscv, lkml, netdev
+ starfive,gtxclk-dlychain: + $ref: /schemas/types.yaml#/definitions/uint32 + description: GTX clock delay chain setting
Please could you add more details to this. Is this controlling the RGMII delays? 0ns or 2ns?
+ gmac: ethernet@10020000 {
+ compatible = "starfive,jh7100-dwmac", "snps,dwmac";
+ reg = <0x0 0x10020000 0x0 0x10000>;
+ clocks = <&clkgen JH7100_CLK_GMAC_ROOT_DIV>,
+ <&clkgen JH7100_CLK_GMAC_AHB>,
+ <&clkgen JH7100_CLK_GMAC_PTP_REF>,
+ <&clkgen JH7100_CLK_GMAC_GTX>,
+ <&clkgen JH7100_CLK_GMAC_TX_INV>;
+ clock-names = "stmmaceth", "pclk", "ptp_ref", "gtxc", "tx";
+ resets = <&rstgen JH7100_RSTN_GMAC_AHB>;
+ reset-names = "ahb";
+ interrupts = <6>, <7>;
+ interrupt-names = "macirq", "eth_wake_irq";
+ max-frame-size = <9000>;
+ phy-mode = "rgmii-txid";
This is unusual. Does your board have a really long RX clock line to
insert the 2ns delay needed on the RX side?
Andrew
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel