Il 07/12/22 02:42, Xiangsheng Hou (侯祥胜) ha scritto:

Hi Angelo,

On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote:

quoted

Il 05/12/22 07:57, Xiangsheng Hou ha scritto:

quoted

Add optional nfi_hclk which needed for MT7986.

Signed-off-by: Xiangsheng Hou <redacted>

Is there any operation for which you need NFI_HCLK enabled, but at
the same time
PAD_CLK and/or NFI_CLK can be disabled?

No, for the new IP design on MT7986, will need the
PAD_CLK/NFI_CLK/NFI_HCLK enabled at the same time.

quoted

If NFI_HCLK and NFI_CLK must always be ON at the same time, adding
this clock to
spi-mtk-snfi.c is *not* an optimal way of doing things: you can, at
this point,
set NFI_HCLK as parent of NFI_CLK in the MT7986 clock driver instead,
without
making any addition to this driver at all.

For some IC, there may have only NFI_CLK/PAD_CLK, and have no NFI_HCLK,
this rely on IC design.

I've just checked clk-mt7986-infracfg and we can't reparent NFI1_CK, nor SPINFI1_CK
as they have xxxx_sel parents already, which are not common with the HCK.

You're right, the addition of the nfi_hclk clock is needed, which means that for
this commit, you get my


Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>


P.S.: Thanks for clarifying!

Regards,
Angelo

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