On Wed, Oct 12, 2022 at 03:09:26PM +0000, Radovanovic, Aleksandar wrote:

quoted

On Wed, Oct 12, 2022 at 01:37:54PM +0000, Radovanovic, Aleksandar wrote:

quoted

quoted

On Wed, Oct 12, 2022 at 10:34:23AM +0000, Radovanovic, Aleksandar

wrote:

quoted

quoted

quoted

As for GITS_TRANSLATER, we can take up to 4 different IOVAs, which
limits us to 4 CDX devices (should be sufficient for current HW
use-cases). Also, it means that the address part must be the same
for all vectors within a single CDX device. I'm assuming this is
OK as it is going to be a single interrupt and IOMMU domain anyway.

This is not at all how MSI is supposed to work.

In the general case, no, they're not.

I don't mean that you can hack this to work - I mean that in MSI the
addr/data is supposed to come from the end point itself, not from some kind
of shared structure. This is important because the actual act of generating
the write has to be coherent with the DMA the device is doing, as the MSI
write must push any DMA data to visibility to meet the "producer /
consumer" model.

I'm not sure I follow your argument, the limitation here is that the MSI
address value is shared between vectors of the same device (requester id
or endpoint, whichever way you prefer to call it), not between
devices.

That isn't what you said, you said "we can take up to 4 different
IOVAs, which limits us to 4 CDX devices" - which sounds like HW being
shared across devices??

Jason

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