Re: [PATCH v2 09/20] dt-bindings: reset: npcm: add GCR syscon property
From: Krzysztof Kozlowski <hidden>
Date: 2022-06-08 10:21:10
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linux-clk, linux-devicetree, linux-serial, linux-watchdog, lkml
On 08/06/2022 11:56, Tomer Maimon wrote:
Describe syscon property that handles general control registers(GCR) in Nuvoton BMC NPCM reset driver.
I already asked about this. Could you please implement the comments you receive? It's not just one, it's several of them have to be repeated.
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Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- .../devicetree/bindings/reset/nuvoton,npcm-reset.yaml | 6 ++++++ 1 file changed, 6 insertions(+)diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml index 0998f481578d..c6bbc1589ab9 100644 --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml@@ -19,6 +19,10 @@ properties: '#reset-cells': const: 2 + nuvoton,sysgcr: + $ref: "/schemas/types.yaml#/definitions/phandle"
Skip quotes.
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+ description: a phandle to access GCR registers. + nuvoton,sw-reset-number: $ref: /schemas/types.yaml#/definitions/uint32 minimum: 1@@ -31,6 +35,7 @@ required: - compatible - reg - '#reset-cells' + - nuvoton,sysgcr
Aren't you breaking existing DTBs?
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additionalProperties: false@@ -41,6 +46,7 @@ examples: compatible = "nuvoton,npcm750-reset"; reg = <0xf0801000 0x70>; #reset-cells = <2>; + nuvoton,sysgcr = <&gcr>; nuvoton,sw-reset-number = <2>; };
Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel