Re: [PATCH] arm64: dts: exynos: correct GIC CPU interfaces address range on Exynos7

On 05/08/2021 11:43, Krzysztof Kozlowski wrote:

On 05/08/2021 11:26, Alim Akhtar wrote:

quoted

Hi Krzysztof,

quoted

-----Original Message-----
From: Krzysztof Kozlowski <redacted>
Sent: 05 August 2021 13:07
To: Rob Herring <robh+dt@kernel.org>; devicetree@vger.kernel.org; linux-
arm-kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
kernel@vger.kernel.org
Cc: Alim Akhtar <alim.akhtar@samsung.com>; Chanwoo Choi
[off-list ref]; Pankaj Dubey [off-list ref];
Sam Protsenko [off-list ref]; Marc Zyngier
[off-list ref]
Subject: Re: [PATCH] arm64: dts: exynos: correct GIC CPU interfaces address
range on Exynos7

On 05/08/2021 09:21, Krzysztof Kozlowski wrote:

quoted

The GIC-400 CPU interfaces address range is defined as 0x2000-0x3FFF
(by ARM).

Looking at DDI0471B_gic400_r0p1_trm.pdf, CPU interface range is 0x0000 ~ 0x10000

quoted

I underestimated the issue - this is actually bug as there is a GICC_DIR
register at offset 0x1000. Therefore:

Looking at the exynos7 and exynos5433 UMs looks like GICC_DIR is at offset 0x2100 (from 0x1100_0000 GIC base)
It is possible for you to cross check once?

That's a mistake in Exynos manual. GICC_DIR is at 0x1000:

0x1000 from CPU base offset, so 0x3000 from GIC base.

https://developer.arm.com/documentation/ddi0471/b/programmers-model/cpu-interface-register-summary

We have discussion here:
https://lore.kernel.org/linux-samsung-soc/0277c701-cc25-cdc5-d3b9-cf2cc2ba4de5@canonical.com/T/#m1ced9a28bed27f5cf74e281fb68efe1b57d5609e (local)

Range of 0x10000 is definitely wrong as it overlaps with two other
ranges.

Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel