Re: [PATCH v4 02/11] coresight: tmc-etr: Add barrier after updating AUX ring buffer
From: Suzuki K Poulose <suzuki.poulose@arm.com>
Date: 2021-07-12 10:40:33
Also in:
linux-perf-users, lkml
On 11/07/2021 11:40, Leo Yan wrote:
quoted hunk ↗ jump to hunk
Since a memory barrier is required between AUX trace data store and aux_head store, and the AUX trace data is filled with memcpy(), it's sufficient to use smp_wmb() so can ensure the trace data is visible prior to updating aux_head. Signed-off-by: Leo Yan <redacted> --- drivers/hwtracing/coresight/coresight-tmc-etr.c | 8 ++++++++ 1 file changed, 8 insertions(+)diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c index acdb59e0e661..713205db15a1 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c@@ -1563,6 +1563,14 @@ tmc_update_etr_buffer(struct coresight_device *csdev, */ if (etr_perf->snapshot) handle->head += size; + + /* + * It requires the ordering between the AUX trace data and aux_head + * store, below smp_wmb() ensures the AUX trace data is visible prior + * to updating aux_head. + */
Please could we reword this a bit, something like : /* * Ensure that the AUX trace data is visible before the aux_head * is updated via perf_aux_output_end(), as expected by the * perf ring buffer. */
+ smp_wmb(); +
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel