Re: [PATCH 0/3] arm64: Fix cpuidle with pseudo-NMI enabled

Hi Sudeep,

On Thu, 10 Jun 2021 18:43:52 +0100,
Sudeep Holla [off-list ref] wrote:

On Thu, Jun 10, 2021 at 05:28:23PM +0100, Lorenzo Pieralisi wrote:

quoted

On Tue, Jun 08, 2021 at 06:27:12PM +0100, Marc Zyngier wrote:

quoted

It appears that although cpu_do_idle() is correctly dealing with the
PMR/DAIF duality, the PSCI cpu-suspend code has been left unaware of
it.

On a system that uses PSCI for idle (such as the Ampere Altra I have
access to), the kernel dies as soon as it enters idle (interrupts are
off at the GIC CPU interface level). Boo.

[...]

quoted

I wonder whether this arm_cpuidle_{save,restore}_context() should
be moved into the gic_cpu_pm_notifier() itself - which would
solve also the PSCI suspend issue Sudeep raised - it would be
a bit ugly though (CPU PM notifiers are run in S2R and CPUidle

+1 if possible, I hadn't fully understood the issue to make this
suggestion. But yes if possible, we must to honour the abstraction even
though PSCI is the only user 😄.

See my reply to Lorenzo. Once we switch from PMR to DAIF masking, none
of the local interrupt control helpers work anymore. If we start
leaking this change of behaviour at a higher level in the stack, I
have no idea what happens anymore.

Which is why we perform such switching in very localised cases such as
exception, guest entry, and (oh surprise! ;-) cpu_do_idle().

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

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