[PATCH 37/73] arm64: tegra: Fix #address-cells/#size-cells for SRAM on Tegra186
From: Thierry Reding <hidden>
Date: 2020-06-16 14:07:24
Also in:
linux-tegra
Subsystem:
the rest · Maintainer:
Linus Torvalds
From: Thierry Reding <redacted> The standard mmio-sram bindings require the #address- and #size-cells properties to be 1. Signed-off-by: Thierry Reding <redacted> --- arch/arm64/boot/dts/nvidia/tegra186.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 58100fb9cd8b..373f575b8678 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi@@ -1216,20 +1216,20 @@ gpu@17000000 { sysram@30000000 { compatible = "nvidia,tegra186-sysram", "mmio-sram"; reg = <0x0 0x30000000 0x0 0x50000>; - #address-cells = <2>; - #size-cells = <2>; - ranges = <0 0x0 0x0 0x30000000 0x0 0x50000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x30000000 0x50000>; cpu_bpmp_tx: shmem@4e000 { compatible = "nvidia,tegra186-bpmp-shmem"; - reg = <0x0 0x4e000 0x0 0x1000>; + reg = <0x4e000 0x1000>; label = "cpu-bpmp-tx"; pool; }; cpu_bpmp_rx: shmem@4f000 { compatible = "nvidia,tegra186-bpmp-shmem"; - reg = <0x0 0x4f000 0x0 0x1000>; + reg = <0x4f000 0x1000>; label = "cpu-bpmp-rx"; pool; };
--
2.24.1
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