Some dwc3 based platforms may also have the problem AC64 bit (bit 0)
of HCCPARAMS1 set to be 1 but the controller actually can't support
64-bit address when SoC integration, so enable XHCI_NO_64BIT_SUPPORT
via dts property "snps,xhci-dis-64bit-support-quirk".
Signed-off-by: Li Jun <redacted>
---
drivers/usb/host/xhci-plat.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index 1d4f6f8..f782aea 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -290,6 +290,10 @@ static int xhci_plat_probe(struct platform_device *pdev)
device_property_read_u32(tmpdev, "imod-interval-ns",
&xhci->imod_interval);
+
+ if (device_property_read_bool(tmpdev,
+ "snps,xhci-dis-64bit-support-quirk"))
+ xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
}
hcd->usb_phy = devm_usb_get_phy_by_phandle(sysdev, "usb-phy", 0);
--
2.7.4
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