Re: [PATCH V3 05/20] clk: tegra: dfll: registration for multiple SoCs
From: Stephen Boyd <sboyd@kernel.org>
Date: 2018-12-18 18:02:24
Also in:
linux-clk, linux-tegra
From: Stephen Boyd <sboyd@kernel.org>
Date: 2018-12-18 18:02:24
Also in:
linux-clk, linux-tegra
Quoting Joseph Lo (2018-12-18 01:12:17)
From: Peter De Schrijver <redacted> In a future patch, support for the DFLL in Tegra210 will be introduced. This requires support for more than 1 set of CVB and CPU max frequency tables. Signed-off-by: Peter De Schrijver <redacted> Signed-off-by: Joseph Lo <redacted> Acked-by: Jon Hunter <jonathanh@nvidia.com> ---
Acked-by: Stephen Boyd <sboyd@kernel.org> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel