Thread (40 messages) 40 messages, 5 authors, 2018-12-18

Re: [PATCH V2 09/21] clk: tegra: dfll: add protection for find_vdd_map APIs

From: Peter De Schrijver <hidden>
Date: 2018-12-17 11:38:32
Also in: linux-clk, linux-tegra

On Fri, Dec 14, 2018 at 03:42:45PM +0800, Joseph Lo wrote:
On 12/13/18 8:46 PM, Jon Hunter wrote:
quoted
On 13/12/2018 09:34, Joseph Lo wrote:
quoted
The DFLL hardware supports both I2C and PWM based regulator. SW driver
only touches I2C regulator when generating LUT. And shouldn't touch it
anymore once the DFLL is enabled.
I am not sure that the last two sentences are above are relevant and
confused me a little at first. I would be tempted to drop them.
Indeed, they are irrelevant. Just want to describe that once we created LUT
table, it means we cached the regulator output table in driver. Then we
don't need to query voltage data from regulator again. This is specific to
the I2C mode only and happens in driver initialization time. Which means the
two APIs we add the WARN here maybe not really necessary. Because this is
suggested by Peter.

Hi Peter,

Just want to double confirm again, do we really need to add a WARN here?
Since we don't and shouldn't access these two APIs once the driver is
working, all the voltage query should be via LUT. So I think add WARN here
is not really necessary.
It's not really necessary. It's more of a safeguard to make sure someone
who modifies the code later and might not be aware of this limitation
would accidently call the functions when PWM mode is in use.

Peter.

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