Re: [PATCH V2 10/21] clk: tegra: dfll: add CVB tables for Tegra210
From: Jon Hunter <jonathanh@nvidia.com>
Date: 2018-12-13 12:50:22
Also in:
linux-clk, linux-tegra
On 13/12/2018 09:34, Joseph Lo wrote:
Add CVB tables with different chip characterization, so that we can generate the customize OPP table that suitable for different chips with different SKUs. Signed-off-by: Joseph Lo <redacted>
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quoted hunk ↗ jump to hunk
diff --git a/drivers/clk/tegra/cvb.h b/drivers/clk/tegra/cvb.h index bcf15a089b93..91a1941c21ef 100644 --- a/drivers/clk/tegra/cvb.h +++ b/drivers/clk/tegra/cvb.h@@ -41,6 +41,7 @@ struct cvb_cpu_dfll_data { u32 tune0_low; u32 tune0_high; u32 tune1; + unsigned int tune_high_min_millivolts; };
Sorry, I forgot to respond to this on the previous version. I think that it is OK to add now, but please add a comment in the changelog to reflect that this is not currently used, but we have plans to use it and so we are adding all the data now. Cheers Jon -- nvpublic _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel