On 2018-05-10 8:50 PM, Robin Murphy wrote:

On 10/05/18 10:16, djw at t-chip.com.cn wrote:

quoted

From: Levin Du <redacted>

Adding a new gpio controller named "gpio-syscon10" to rk3328, providing
access to the pins defined in the syscon GRF_SOC_CON10.

This is the GPIO_MUTE pin, right? The public TRM is rather vague, but 
cross-referencing against the datasheet and schematics implies that 
it's the "gpiomut_*" part of the GRF bit names which is most significant.

It might be worth using a more descriptive name here, since "syscon10" 
is pretty much meaningless at the board level.

Robin.

Previously I though other bits might be able to reference from syscon10, 
other than GPIO_MUTE alone.
If it is renamed to gpio-mute, then the GPIO_MUTE pin is accessed as 
`<&gpio-mute 1>`. Yet other
bits in syscon10 can also be referenced, say, `<&gpio-mute 10>`, which 
is not good.

I'd like to add a `gpio,syscon-bit` property to gpio-syscon, which 
overrides the properties
of bit_count,? data_bit_offset and dir_bit_offset in the driver. For 
example:

 ??????????????? gpio_mute: gpio-mute {
 ??????????????????????? compatible = "rockchip,gpio-syscon";
 ??????????????????????? gpio-controller;
 ??????????????????????? #gpio-cells = <2>;
 ??????????????????????? gpio,syscon-dev = <0 0x0428 0>;
 ??????????????????????? gpio,syscon-bit = <1 1 0>;
 ??????????????? };

That way, the mute pin is strictly specified as <&gpio_mute 0>, and 
<&gpio_mute 1> will be invalid.
I think that is neat, and consistent with the gpio_mute name.

Thanks
Levin