[PATCH v3 16/22] firmware: arm_scmi: add arm_mhu specific mailbox interface
From: jassisinghbrar@gmail.com (Jassi Brar)
Date: 2017-10-13 15:19:17
Also in:
linux-devicetree, lkml
From: jassisinghbrar@gmail.com (Jassi Brar)
Date: 2017-10-13 15:19:17
Also in:
linux-devicetree, lkml
On Fri, Oct 13, 2017 at 8:17 PM, Sudeep Holla [off-list ref] wrote:
On 13/10/17 15:12, Jassi Brar wrote:quoted
In MHU the 32bits are tied together and all go to one target processor. Whereas on QCom, each bit corresponds to independent signal going to a different target processor.I was not aware of that. Thanks for clarifying the differences.quoted
IOW, QCom has 32 channels per register whereas MHU has one. TheOK, that depends on how we consider it. As you said yes it just goes to single target processor, but hardware designers consider it still 32 channels are they can be controller independently without any locking.
MHU spec says it has three channels. Locking is not a criterion for a channel. A signal and associated data transfer defines a channel. cheers