[PATCH] fpga zynq: Check the bitstream for validity

On Wed, Nov 09, 2016 at 04:18:29PM +0100, Matthias Brugger wrote:

I get your point. Especially looping to the whole file to find the sync
header can take a while, especially if the file is big and the sync header
is not present.

Er, no not at all. If you send garbage to the FPGA the driver detects
it after a 2.5s timeout. The memory scan is always alot faster.

In the normal success case it is ~5 compares.

So I think the whole idea behind this patch is to provide feedback to the
user about what went wrong when trying to update the FPGA. Is there a way to
get this information from the hardware which discards the update?

No, not with such specificity.

Jason