[PATCH] fpga zynq: Check the bitstream for validity flat view STALE3626d From: Jason Gunthorpe <hidden> Date: 2016-10-28 15:48:19 On Fri, Oct 28, 2016 at 01:12:06PM +0200, Matthias Brugger wrote:quotedZynq is also only able to DMA dword quantities, so bitstreams must be a multiple of 4 bytes. This also fixes a DMA-past the end bug. The you can also fix the transfer_length calculation in zynq_fpga_ops_write, as we don't allow buffers which are not a multiple of 4. Didn't I do that? Did you see something else to change in the dma part? Jason
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