[PATCH/RFC v2 10/11] ARM: dts: r8a7794: Add SYSC PM domains
From: geert+renesas@glider.be (Geert Uytterhoeven)
Date: 2016-02-15 21:16:59
Also in:
linux-devicetree, linux-pm, linux-renesas-soc
Subsystem:
the rest · Maintainer:
Linus Torvalds
Add a device node for the System Controller, with subnodes that represent the hardware power area hierarchy. Hook up the Cortex-A7 CPU cores and the Cortex-A7 L2 cache/SCU to their respective PM domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- v2: - Change one-line summary prefix to match current arm-soc practices, - Update compatible values. --- arch/arm/boot/dts/r8a7794.dtsi | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/r8a7794.dtsi b/arch/arm/boot/dts/r8a7794.dtsi
index 21a02df3609b24aa..d0fc735571242fd1 100644
--- a/arch/arm/boot/dts/r8a7794.dtsi
+++ b/arch/arm/boot/dts/r8a7794.dtsi@@ -40,6 +40,7 @@ compatible = "arm,cortex-a7"; reg = <0>; clock-frequency = <1000000000>; + power-domains = <&pd_ca7_cpu0>; next-level-cache = <&L2_CA7>; };
@@ -48,12 +49,14 @@ compatible = "arm,cortex-a7"; reg = <1>; clock-frequency = <1000000000>; + power-domains = <&pd_ca7_cpu1>; next-level-cache = <&L2_CA7>; }; }; L2_CA7: cache-controller at 1 { compatible = "cache"; + power-domains = <&pd_ca7_scu>; cache-unified; cache-level = <2>; };
@@ -1152,6 +1155,43 @@ }; }; + sysc: system-controller at e6180000 { + compatible = "renesas,r8a7794-sysc", "renesas,rcar-gen2-sysc"; + reg = <0 0xe6180000 0 0x0200>; + + pm-domains { + #address-cells = <2>; + #size-cells = <0>; + + pd_ca7_scu: scu at 21 { + reg = <21 0x100>; + #address-cells = <2>; + #size-cells = <0>; + #power-domain-cells = <0>; + + pd_ca7_cpu0: cpu at 5 { + reg = <5 0x1c0>; + #power-domain-cells = <0>; + }; + + pd_ca7_cpu1: cpu at 6 { + reg = <6 0x1c0>; + #power-domain-cells = <0>; + }; + }; + + pd_sh: sh at 16 { + reg = <16 0x80>; + #power-domain-cells = <0>; + }; + + pd_sgx: sgx at 20 { + reg = <20 0xc0>; + #power-domain-cells = <0>; + }; + }; + }; + ipmmu_sy0: mmu at e6280000 { compatible = "renesas,ipmmu-r8a7794", "renesas,ipmmu-vmsa"; reg = <0 0xe6280000 0 0x1000>;
--
1.9.1