[PATCH v10 5/5] Watchdog: ARM SBSA Generic Watchdog half timeout panic support
From: Thomas Petazzoni <hidden>
Date: 2016-02-05 13:33:24
Also in:
linux-devicetree, linux-watchdog, lkml
From: Thomas Petazzoni <hidden>
Date: 2016-02-05 13:33:24
Also in:
linux-devicetree, linux-watchdog, lkml
Hello, On Fri, 5 Feb 2016 07:08:23 -0600, Timur Tabi wrote:
quoted
I'm quite certainly missing something completely obvious here, but how can you get the WS1 interrupt*after* raising a panic? Aren't all interrupts disabled and the system fully halted once you get a panic(), especially when raised from an interrupt handler? If that's the case, how can the system continue to do things, such as receiving the WS1 interrupt and resetting ?Typically, WS1 is not an interrupt. Instead, it's a hard system-level reset.
Ah, right, true. I missed that aspect because on my HW, triggering a system-level reset on WS1 is optional. I can actually get an interrupt on both WS0 and WS1, and no reset at all. But a normal configuration indeed involves having the WS1 event configured in HW to be a system-level reset. So, OK, it makes sense. Thanks for the clarification! Thomas -- Thomas Petazzoni, CTO, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com