Add the devicetree binding for the cru on the rk3036 which quite similar
structured as previous clock controllers.

Signed-off-by: Xing Zheng <redacted>
---

Changes in v2: None

 .../bindings/clock/rockchip,rk3036-cru.txt         |   60
++++++++++++++++++++ 1 file changed, 60 insertions(+)
 create mode 100644
Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt

diff --git a/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt

b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt new file
mode 100644
index 0000000..ac3037a

--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt

@@ -0,0 +1,60 @@
+* Rockchip RK3036 Clock and Reset Unit
+
+The RK3036 clock controller generates and supplies clock to various
+controllers within the SoC and also implements a reset controller for SoC
+peripherals.
+
+Required Properties:
+
+- compatible: should be "rockchip,rk3036-cru"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- #clock-cells: should be 1.
+- #reset-cells: should be 1.
+
+Optional Properties:
+
+- rockchip,grf: phandle to the syscon managing the "general register files"
+  If missing pll rates are not changable, due to the missing pll lock

status. +
+Each clock is assigned an identifier and client nodes can use this
identifier +to specify the clock which they consume. All available clocks
are defined as +preprocessor macros in the dt-bindings/clock/rk3036-cru.h
headers and can be +used in device tree sources. Similar macros exist for
the reset sources in +these files.
+
+External clocks:
+
+There are several clocks that are generated outside the SoC. It is expected
+that they are defined using standard clock bindings with following
+clock-output-names:
+ - "xin24m" - crystal input - required,
+ - "xin32k" - rtc clock - optional,