Thread (32 messages) 32 messages, 3 authors, 2014-11-05
STALE4246d

[PATCH 4/7] can: m_can: add a bit delay after setting CCCR_INIT bit

From: mkl@pengutronix.de (Marc Kleine-Budde)
Date: 2014-11-03 16:52:11
Also in: linux-can, netdev

On 10/29/2014 11:45 AM, Dong Aisheng wrote:
The spec mentions there may be a delay until the value written to
INIT can be read back due to the synchronization mechanism between the
two clock domains. But it does not indicate the exact clock cycles needed.
The 5us delay is a test value and seems ok.

Without the delay, CCCR.CCE bit may fail to be set and then the
initialization fail sometimes when do repeatly up and down.

Signed-off-by: Dong Aisheng <redacted>
Applied to can/master.

Thanks,
Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

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