Thread (23 messages) flat view 23 messages, 5 authors, 2014-07-14
STALE4406d

Revision v9 of 8 in this series.

Revisions (8)
  1. v9 [diff vs current]
  2. v9 [diff vs current]
  3. v9 [diff vs current]
  4. v9 [diff vs current]
  5. v9 [diff vs current]
  6. v9 [diff vs current]
  7. v9 current
  8. v9 [diff vs current]

[PATCH V9 2/7] phy: Add drivers for PCIe and SATA phy on SPEAr13xx

From: viresh.kumar@linaro.org (Viresh Kumar)
Date: 2014-07-14 05:31:47
Also in: linux-pci

On 10 July 2014 18:47, Kishon Vijay Abraham I [off-list ref] wrote:
quoted
diff --git a/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
new file mode 100644
index 0000000..b9b281a
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st-spear1310-miphy.txt
We generally create a single document for a SoC vendor. So just use st-phy.txt.
st-phy may not be appropriate as this is specifically for SPEAr. New
binding doc looks like this:
diff --git a/Documentation/devicetree/bindings/phy/st-spear-miphy.txt
b/Documentation/devicetree/bindings/phy/st-spear-miphy.txt
new file mode 100644
index 0000000..2a6bfdc
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/st-spear-miphy.txt
@@ -0,0 +1,15 @@
+ST SPEAr miphy DT details
+=========================
+
+ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
+
+Required properties:
+- compatible : should be "st,spear1310-miphy" or "st,spear1340-miphy"
+- reg : offset and length of the PHY register set.
+- misc: phandle for the syscon node to access misc registers
+- #phy-cells : from the generic PHY bindings, must be 1.
+       - cell[1]: 0 if phy used for SATA, 1 for PCIe.
+
+Optional properties:
+- phy-id: Instance id of the phy. Only required when there are multiple phys
+  present on a implementation.
Keyboard shortcuts
hback out one level
jnext message in thread
kprevious message in thread
ldrill in
Escclose help / fold thread tree
?toggle this help