[PATCH v2 10/18] ARM: dts: dra7xx-clocks: Add missing 32khz clocks used for PHY
From: Tero Kristo <hidden>
Date: 2014-06-19 11:17:00
Also in:
linux-devicetree, linux-omap, linux-pci, lkml
From: Tero Kristo <hidden>
Date: 2014-06-19 11:17:00
Also in:
linux-devicetree, linux-omap, linux-pci, lkml
On 05/29/2014 09:38 AM, Kishon Vijay Abraham I wrote:
Added missing 32khz clock used by PCIe PHY. The documention for this node can be found @ ../bindings/clock/ti/gate.txt.
You can drop the node documentation ref, and rather add a TRM reference about hardware details. Other than that, looks good to me. -Tero
Cc: Tony Lindgren <tony@atomide.com> Cc: Rajendra Nayak <redacted> Cc: Tero Kristo <redacted> Cc: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <redacted> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <redacted> Signed-off-by: Kishon Vijay Abraham I <redacted> --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 44993ec..e1bd052 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi@@ -1165,6 +1165,14 @@ reg = <0x021c>, <0x0220>; }; + optfclk_pciephy_32khz: optfclk_pciephy_32khz at 4a0093b0 { + compatible = "ti,gate-clock"; + clocks = <&sys_32k_ck>; + #clock-cells = <0>; + reg = <0x13b0>; + ti,bit-shift = <8>; + }; + optfclk_pciephy_div: optfclk_pciephy_div at 4a00821c { compatible = "ti,divider-clock"; clocks = <&apll_pcie_ck>;