On 01/20/2014 05:52 PM, Sergei Ianovich wrote:

On Mon, 2014-01-20 at 17:20 +0100, Daniel Mack wrote:

quoted

On 01/20/2014 05:08 PM, Sergei Ianovich wrote:

quoted

It's over a month now. Is anything wrong?

No, I'm busy, that's all.

Thanks for reply.

quoted

That said, the current situation is

a) we need someone to have a look at the performance regression of the
MMC file system layer that you reported. I couldn't find a PXA-based
board yet with a MMC slot soldered on it. But as you apparently have
such hardware, I'd really appreciate your help here. Could you do some
measurements and see whether you see major differences in packet size or
timings?

I have the hardware with MMC, but none of the other devices. Could you
give some pointer where to start? How would you do measurements?

Please check whether the DMA engine transfers data in chunks of
comparable size in both cases. Also, take time stamps when the packet is
submitted, and calculate the delta when the transfer returns. See if any
significant time gap contributes to the regression you see.

After all, it's still quite possible that the DMA driver has performance
bottlenecks. We need to find the code where so much more time is spent
with the new implementation.

It would be nice to have updated patches. Most interesting is whether
the new DMA still works as expected for other devices.

I'll allocate a time slot for that :)

Apart from that, would mind if my series is landed with a workaround
(Patch v3 7/21). I hope you understand it doesn't feel good to depend on
something with no development activity.

I understand, but that shouldn't keep you you from maintaining a patch
stack out-of-tree until things are in shape enough to go mainline.


Thanks for you help,
Daniel