[PATCH v5 2/4] devicetree: bindings: Document Krait CPU/L1 EDAC
From: Lorenzo Pieralisi <hidden>
Date: 2014-01-16 11:33:39
Also in:
linux-arm-msm, linux-devicetree, lkml
On Thu, Jan 16, 2014 at 01:38:40AM +0000, Stephen Boyd wrote:
quoted hunk ↗ jump to hunk
On 01/15, Stephen Boyd wrote:quoted
Ah sorry, I forgot to put the compatible property here like in the dts change. I'll do that in the next revision. Yes we need a compatible property here to match the platform driver.This is the replacement patch -----8<------ From: Stephen Boyd <redacted> Subject: [PATCH v9] devicetree: bindings: Document Krait CPU/L1 EDAC The Krait CPU/L1 error reporting device is made up a per-CPU interrupt. While we're here, document the next-level-cache property that's used by the Krait EDAC driver. Cc: Lorenzo Pieralisi <redacted> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Kumar Gala <redacted> Cc: <redacted> Signed-off-by: Stephen Boyd <redacted> --- Documentation/devicetree/bindings/arm/cpus.txt | 58 ++++++++++++++++++++++++++ 1 file changed, 58 insertions(+)diff --git a/Documentation/devicetree/bindings/arm/cpus.txt b/Documentation/devicetree/bindings/arm/cpus.txt index 91304353eea4..03a529e791c4 100644 --- a/Documentation/devicetree/bindings/arm/cpus.txt +++ b/Documentation/devicetree/bindings/arm/cpus.txt@@ -62,6 +62,20 @@ nodes to be present and contain the properties described below. Value type: <u32> Definition: must be set to 0 + - compatible + Usage: optional + Value type: <string> + Definition: should be one of the compatible strings listed + in the cpu node compatible property. This property + shall only be present if all the cpu nodes have the + same compatible property.
Do we really want to do that ? I am not sure. A cpus node is supposed to be a container node, we should not define this binding just because we know the kernel creates a platform device for it then. interrupts is a cpu node property and I think it should be kept as such. I know it will be duplicated and I know you can't rely on a platform device for probing (since if I am not mistaken, removing a compatible string from cpus prevents its platform device creation), but that's an issue related to how the kernel works, you should not define DT bindings to solve that IMHO. Lorenzo
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+ + - interrupts + Usage: required when node contains cpus with compatible + string "qcom,krait". + Value type: <prop-encoded-array> + Definition: L1/CPU error interrupt + - cpu node Description: Describes a CPU in an ARM based system@@ -191,6 +205,11 @@ nodes to be present and contain the properties described below. property identifying a 64-bit zero-initialised memory location. + - next-level-cache + Usage: optional + Value type: <phandle> + Definition: phandle pointing to the next level cache + Example 1 (dual-cluster big.LITTLE system 32-bit): cpus {@@ -382,3 +401,42 @@ cpus { cpu-release-addr = <0 0x20000000>; }; }; + + +Example 5 (Krait 32-bit system): + +cpus { + #address-cells = <1>; + #size-cells = <0>; + interrupts = <1 9 0xf04>; + compatible = "qcom,krait"; + + cpu at 0 { + device_type = "cpu"; + reg = <0>; + next-level-cache = <&L2>; + }; + + cpu at 1 { + device_type = "cpu"; + reg = <1>; + next-level-cache = <&L2>; + }; + + cpu at 2 { + device_type = "cpu"; + reg = <2>; + next-level-cache = <&L2>; + }; + + cpu at 3 { + device_type = "cpu"; + reg = <3>; + next-level-cache = <&L2>; + }; + + L2: l2-cache { + compatible = "cache"; + interrupts = <0 2 0x4>; + }; +};-- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation