[PATCH v3 06/10] clk: exynos5420: register clocks using common clock framework
From: arnd@arndb.de (Arnd Bergmann)
Date: 2013-06-17 12:27:22
Also in:
linux-samsung-soc, linux-serial
On Monday 17 June 2013 16:30:31 Chander Kashyap wrote:
quoted hunk ↗ jump to hunk
diff --git a/Documentation/devicetree/bindings/clock/exynos5420-clock.txt b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt new file mode 100644 index 0000000..9bcc4b1 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/exynos5420-clock.txt@@ -0,0 +1,201 @@ +* Samsung Exynos5420 Clock Controller + +The Exynos5420 clock controller generates and supplies clock to various +controllers within the Exynos5420 SoC. + +Required Properties: + +- comptible: should be one of the following. + - "samsung,exynos5420-clock" - controller compatible with Exynos5420 SoC. + +- reg: physical base address of the controller and length of memory mapped + region. + +- #clock-cells: should be 1. + +The following is the list of clocks generated by the controller. Each clock is +assigned an identifier and client nodes use this identifier to specify the +clock which they consume. + + + [Core Clocks] + + Clock ID + ---------------------------- + + fin_pll 1 + + [Clock Gate for Special Clocks] + + Clock ID + ---------------------------- + sclk_uart0 128 + sclk_uart1 129 + sclk_uart2 130
+ + [Peripheral Clock Gates] + + Clock ID + ---------------------------- + + aclk66_peric 256 + uart0 257 + uart1 258
It looks like these are actually separate things. Wouldn't it be more sensible to have separate device nodes for each of the lists and use a local index? What numbers are used in the data sheet? Arnd