[PATCH 2/4] clk: ux500: Support for prmcu_rate clock
From: Ulf Hansson <hidden>
Date: 2012-08-31 12:22:52
Also in:
lkml
Subsystem:
common clk framework, the rest, ux500 clock drivers · Maintainers:
Michael Turquette, Stephen Boyd, Linus Torvalds, Ulf Hansson
From: Ulf Hansson <redacted> The prmcu_rate clock is not gateable and has a rate which only can be fetched. Signed-off-by: Ulf Hansson <redacted> --- drivers/clk/ux500/clk-prcmu.c | 14 ++++++++++++++ drivers/clk/ux500/clk.h | 5 +++++ 2 files changed, 19 insertions(+)
diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c
index 1d779ad..930cdfe 100644
--- a/drivers/clk/ux500/clk-prcmu.c
+++ b/drivers/clk/ux500/clk-prcmu.c@@ -153,6 +153,11 @@ static struct clk_ops clk_prcmu_gate_ops = { .recalc_rate = clk_prcmu_recalc_rate, }; +static struct clk_ops clk_prcmu_rate_ops = { + .is_enabled = clk_prcmu_is_enabled, + .recalc_rate = clk_prcmu_recalc_rate, +}; + static struct clk_ops clk_prcmu_opp_gate_ops = { .prepare = clk_prcmu_opp_prepare, .unprepare = clk_prcmu_opp_unprepare,
@@ -228,6 +233,15 @@ struct clk *clk_reg_prcmu_gate(const char *name, &clk_prcmu_gate_ops); } +struct clk *clk_reg_prcmu_rate(const char *name, + const char *parent_name, + u8 cg_sel, + unsigned long flags) +{ + return clk_reg_prcmu(name, parent_name, cg_sel, 0, flags, + &clk_prcmu_rate_ops); +} + struct clk *clk_reg_prcmu_opp_gate(const char *name, const char *parent_name, u8 cg_sel,
diff --git a/drivers/clk/ux500/clk.h b/drivers/clk/ux500/clk.h
index 32085aa..836d7d1 100644
--- a/drivers/clk/ux500/clk.h
+++ b/drivers/clk/ux500/clk.h@@ -35,6 +35,11 @@ struct clk *clk_reg_prcmu_gate(const char *name, u8 cg_sel, unsigned long flags); +struct clk *clk_reg_prcmu_rate(const char *name, + const char *parent_name, + u8 cg_sel, + unsigned long flags); + struct clk *clk_reg_prcmu_opp_gate(const char *name, const char *parent_name, u8 cg_sel,
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1.7.10