On Tue, Jul 10, 2012 at 12:42:46, Shilimkar, Santosh wrote:

On Tue, Jul 10, 2012 at 12:11 PM, Hiremath, Vaibhav [off-list ref] wrote:

quoted

On Mon, Jul 09, 2012 at 16:12:15, Shilimkar, Santosh wrote:

quoted

On Mon, Jul 9, 2012 at 2:20 PM, Vaibhav Hiremath [off-list ref] wrote:

quoted

On 7/6/2012 2:51 PM, Santosh Shilimkar wrote:

quoted

From: R Sricharan <redacted>

OMAP socs has a legacy and a highlander version of the
32k sync counter IP. The register offsets vary between the
highlander and the legacy scheme. So use the 'SCHEME'
bits(30-31) of the revision register to distinguish between

Just for my understanding, can we get further information on SCHEME
bit-fields? What kind of information we have it here.

I may need this info to pass on to design team here.

Sure. You can refer to the OMAP4 TRM for the bit builds.
SCHEME bit field tell you difference between a highlander
and legacy IP as the patch says.

Santosh,

Can you point to the section of OMAP4 TRM?

I referred to both Public TRM and internal TRM, but both only did mention
"TI internal Data".

Last time I refereed the internal TRM version. Public TRM doesn't
carry that information
for some reason.

quoted

And as per code, we are not checking any value in 31-30 bit-fields, code
just assumes that, non-zero value would be highlander IP.

There are only two types of IP's today and hence it will be either
0x0 or 0x1. So that check if just fine. The highlander IP may have
more versions but for known OMAPs and upcoming OMAP, this is
the only one supported version.

Some more information on the SCHEME bit field.
-----------------
31:30
SCHEME
Used to distinguish between old scheme and current.

RO Read Only

0x0 -  LEGACY

0x1 - Highlander 0.8 scheme
--------------------------------

Thanks Santosh,

This is what I was looking for, may be it is worth to put this information 
in either commit description of in code-comment.

Thanks,
Vaibhav