Dove clock support

On 06/18/2012 11:42 AM, Sebastian Hesselbarh wrote:

On 06/18/2012 10:43 AM, Andrew Lunn wrote:

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Sure, the address layout is different, but that can be made generic in a
second step. Maybe we need a private pointer in the gate_fn struct.

Yes, something like that.

You need to pass at least the controllers base address. Everything else
is common - IIRC kirkwood has two SATA, dove only one. Moreover the base
addresses for the second are not defined, yet.

Also ge-phy has to be connected with ge-clk, too. But for dove this is
a clk gate while kirkwood can shut it down somewhere else. I guess it
can be handled like sata/pcie on kirkwood.

The PHY is a clock gate so I'm handling it via:

ge = dove_register_gate("ge0", CLOCK_GATING_GBE_BIT | CLOCK_GATING_GIGA_PHY_BIT);

So no gate_fn needed.

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BTW: who will enable the clocks that have been disabled via the
sata/pcie shutdown functions?

This is potentially a problem when the SATA driver is built as a
kernel module. There is no code that i know of to turn the SATA PHYs
back on again. I think this has been broken like this for a long
time...

IMHO the driver should take care of enabling clk and PHYs. In my
understanding of the common clock framework both will be disabled
if no driver requests it.

But the current drivers don't enable clk and PHYs? But if I understand
Andrew correct, this was the case all the time.

Cheers, Marc