On 08/19/2011 02:17 AM, Shawn Guo wrote:

On Fri, Aug 19, 2011 at 02:43:57PM +0800, Shawn Guo wrote:

quoted

On Tue, Aug 16, 2011 at 03:34:54PM -0500, Rob Herring wrote:

quoted

From: Rob Herring <redacted>

This adds basic support for the Calxeda Highbank platform.

Signed-off-by: Rob Herring <redacted>

[...]

quoted

quoted

+static void __init highbank_map_io(void)
+{
+	unsigned long base;
+
+	/* Get SCU base */
+	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
+
+	highbank_io_desc[0].pfn = __phys_to_pfn(base);
+	iotable_init(highbank_io_desc, ARRAY_SIZE(highbank_io_desc));
+}
+

It's a great demo that we can get this base address from CA9 itself.
However I'm wondering if we have to do so, since this address should
be known for given SoC.  Can we put this known base into device tree
and map it when needed?  In that case, we can save another static
mapping.

Hmm, if CA9 can figure this address out by itself, why do not we create
a init hook in arch/arm/kernel/smp_scu.c to have scu code to get and
map the address?  Then the parameter "scu_base" in those scu helper
functions can be saved.

smp_scu.c is not CA9 only and this is a CA9 specific feature. Also, you
have to statically map the scu to get the core count. ioremap is not up
at that point in time. Don't be fooled by omap code either. They do an
ioremap, but it handles their static mappings as well.

Rob