On Fri, Sep 14, 2012 at 06:31:59PM +0100, Arnd Bergmann wrote:

On Friday 14 September 2012, Catalin Marinas wrote:

quoted

(revisiting unanswered emails :))

On Wed, Aug 15, 2012 at 01:33:55AM +0100, Olof Johansson wrote:

quoted

On Tue, Aug 14, 2012 at 06:52:14PM +0100, Catalin Marinas wrote:

quoted

+/*
+ *  I/O port access primitives.
+ */
+#define IO_SPACE_LIMIT             0xffff
+
+/*
+ * We currently don't have any platform with PCI support, so just leave this
+ * defined to 0 until needed.
+ */
+#define PCI_IOBASE         ((void __iomem *)0)

You could just leave out the PCI / I/O code alltogether instead.

I would leave this in as some of the first platforms to appear will have
PCIe. At some point we'll add a fixed address where the PCI_IOBASE is
mapped.

I guess the cleanest way would be to reserve a virtual memory region right away
and document it in the file where you describe the memory layout. Then you can
fill the value in here.

Yes, easy to do. Any access will fault until we add the PCI support.

-- 
Catalin